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Alif Semiconductor /AE302F80F5582LE_CM55_HE_View /DMA2_SEC /DMA_INTMIS

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Interpret as DMA_INTMIS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0IRQ_STATUS

Description

Interrupt Status Register

Fields

IRQ_STATUS

This bit field provides the status of the interrupts that are active in the DMAC.

  • Bit [N] = 0x0: Interrupt N is inactive and therefore IRQ[N] is low.
  • Bit [N] = 0x1: Interrupt N is active and therefore IRQ[N] is high. Note: User must use the DMA_INTCLR register to set bit [N] to 0x0. Note: Bit [N] is 0x0 if the DMA_INTEN register programs DMASEV to signal an event.

Links

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data